NAND-gate Latch

Apply "Set" Pulse

The time sequence at right shows the conditions under which the set and reset inputs cause a state change, and when they don't.

The concept of a "latch" circuit is important to creating memory devices. The function of such a circuit is to "latch" the value created by the input signal to the device and hold that value until some other signal changes it.

Application to switch de-bouncing
Set-reset Flip-flopNOR-gate Latch
To Clocked VersionNAND Gate
Application in D Flip-flop
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Setting the NAND Latch

After being set to Q=1 by the low pulse at S (NAND gate function), the restored normal value S=1 is consistent witht the Q=1 state, so it is stable. Another negative pulse on S gives which does not switch the flip-flop, so it ignores further input.

Apply "Reset" Pulse

The time sequence at right shows the conditions under which the set and reset inputs cause a state change, and when they don't.

NAND-Gate Latch
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Resetting the NAND Latch

Following the truth table for the S-R flip-flop, a negative pulse on the R input drives the output Q to zero.

Return to reset state.

The time sequence at right shows the conditions under which the set and reset inputs cause a state change, and when they don't.

NAND-Gate Latch
Index

Electronics concepts

Digital circuits
 
HyperPhysics*****Electricity and magnetismR Nave
Go Back